劉曉彥 杜剛

摘 要：該研究面向16 nm及以下技術(shù)代集成電路工藝，發(fā)展納米級(jí)半導(dǎo)體器件的模型、模擬技術(shù)，建立新原理邏輯和存儲(chǔ)器件的模型和優(yōu)化設(shè)計(jì)方法并進(jìn)行實(shí)驗(yàn)驗(yàn)證，為納米尺度工藝節(jié)點(diǎn)下集成電路的TCAD奠定理論基礎(chǔ)，為基于新原理器件的集成電路設(shè)計(jì)提供方法和工具。在過去1年中，經(jīng)過課題組全體人員密切合作和努力，在基于電路拓?fù)浣Y(jié)構(gòu)的漏電流快速計(jì)算程序，器件參數(shù)波動(dòng)性的統(tǒng)計(jì)模型，適于電路模擬的新型阻變存儲(chǔ)器模型以及大規(guī)模存儲(chǔ)陣列的模擬，基于III-V半導(dǎo)體材料和二維半導(dǎo)體材料的新材料半導(dǎo)體器件中的輸運(yùn)特性研究等多方面開展了創(chuàng)新工作，取得了一系列的階段性成果。超額完成了該年度的研究任務(wù)。

關(guān)鍵詞：器件模型與模擬 阻變存儲(chǔ)器模型 納米尺度器件 載流子輸運(yùn)

Abstract：IC technology has scaled down to 22 nm node. TCAD becomes an important area to support the technology development.In this project， To meet the needs of 16 nm and beyond technology，we will develop nano scale devices simulation method，investigate model of nano scale devices，and build the TCAD tools for new type logic devices and NV memory devices.In the past years，all members of this research group are working hard and have achieved series innovation results on fast computing method of full circuit leakage current analyst，statics model of device parameter variation，compact model of RRAM devices，large scale memory array simulating method，carrier transports in III-V material and 2D semiconductor material based devices.

Key Words：Device Modeling and simulation；RRAM Model；Nano scale devices；Carrier transport

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